MCO Diagnostic Test Plan


1 Introduction

The purpose of this document is to describe the diagnostic test plan which will be used to identify and isolate hardware problems with the Multi-Channel Output (MCO) board.

1.1 Goals

Based on experience with the earlier video option boards, quantitative goals will be set for the following areas:

Time to fail
Time to repair

1.2 Assumptions

It is assumed that the manufacturing process for the MCO board will be essentially identical to the current process used to manufacture other video option boards on the Indigo2 line. Boards are quickly tested in the functional test area with ``captured'' disk drives and then are sent to pack-out.

Failed MCO boards are sent to the board repair area (Board RA) where the boards are debugged and repaired.

1.3 Strategy

Diagnostics tests will be written to check the operation of each of the functional areas of the MCO.

The standalone ide program will be the primary program used to exercise graphics functionality. The Unix-level suite of tests, systest, may use Unix-level commands, (e.g. setmon) to verify MCO functionality, but the focus of the testing will in the standalone ide area.

The following chapters present a deailed list of the tests/areas-to-test which we plan to use to diagnose the MCO board.


2 MCO Diagnostics

2.0 Test Strategy

The tests are divided into 3 levels:

The following describes the MCO diagnostics tests by level.

2.1 Level 1 Tests - Connectivity

2.1.1 Probe DCBus for MCO Board - MCOProbe

2.1.2 Program FPGAs - mco_initfpga()

2.1.3 7162 DAC Control Register Test - mco_Dac7162CtrlRegTest()

Write and Read patterns in 7162 DAC Control Register.

2.1.4 VC2 SRAM Address Bus Test - mco_VC2AddrsBusTest

Walk 1s and 0s on VC2 Address Bus.

2.1.5 VC2 SRAM Data Bus Test - mco_VC2DataBusTest

Walk 1s and 0s on VC2 Data Bus

2.1.6 VC2 SRAM Address UniquenessTest - mco_VC2AddrsUniqTest

Write complement of address in each SRAM address location

2.2 Level 2 Tests - Internal Functionality

2.2.1 7162 DAC Internal Register Test - mco_Dac7162InternalRegisterTest()

Write and Read patterns in various 7162 DAC Internal Registers.

2.2.2 7162 DAC Mode Register Test - mco_Dac7162ModeRegTest()

Write and Read patterns in 7162 DAC Address Register

2.2.3 7162 DAC Color Palette Address Uniqueness Test - mco_7162ClrPaletteAddrUniqTest()

Write and Read patterns in 7162 DAC Color Palette to verify the Color Palette
is being addressed correctly.

2.2.4 7162 DAC Color Palette Walk Bit Test - mco_7162ClrPaletteAddrUniqTest()

Write and Read walking-bit patterns in 7162 DAC Color Palette to verify the Color Palette is being addressed correctly.

2.2.5 7162 DAC Color Palette Pattern Test - mco_7162ClrPalettePatrnTest()

Write and Read patterns in 7162 DAC Color Palette to verify the Color Palette Ram.

2.2.6 7162 DAC Address Register Test - mco_Dac7162AddrRegTest()

Write and Read patterns in 7162 DAC Address Register

2.2.7 VC2 SRAM Pattern Test - mco_VC2PatrnTest()

Write a sequence of patterns to VC2 SRAM

2.2.8 Write and Read the VC2 Internal Registers - mco_VC2InternalRegTest

Write and Read a Walking 1s and Walking 0s pattern to VC2 internal registers

2.3 Level 3 Tests - Higher-Level Functionality

2.3.1 Read Pixel signature from DAC - mco_DCB_PixelPath.

This test verifies the complete pixel path from the MGras framebuffer to the DAC inputs.

This test does the following:

This verifies that the DCB interface, input and output swizzles, fifos, muxes,
VC2 timing, and DACs are all working correctly.

2.3.2 Read value fromDAC Address register - mco_PeekDacAddr

2.4 Utilities

2.4.1 Reset 7162 DAC to known state - mco_DacReset

2.4.2 Write value to 7162 DAC Address register - mco_Poke7162Addr

2.4.3 Read value from 7162 DAC Address register - mco_Peek7162Addr

2.4.4 Write 16-bit value to DAC Address register - mco_PokeDacAddr16

2.4.5 Read 16-bit value fromDAC Address register - mco_PeekDacAddr16

2.4.6 Write value to 7162 DAC Control register - mco_Poke7162Ctrl

2.4.7 Read value from 7162 DAC Control register - mco_Peek7162Ctrl

2.4.8 Write value to DAC Mode register - mco_PokeDacMode

2.4.9 Read value from 7162 DAC Mode register - mco_Peek7162DacMode

2.4.10 Write value to 7162 DAC Color Palette - mco_Poke7162ClrPalette

2.4.11 Read value from 7162 DAC Color Palette - mco_Peek7162ClrPalette

2.4.12 Load RGB file into MGRAS framebuffer - mco_ipaste

2.4.13 Load timing table into VC2 - mco_loadTT

2.4.14 Write value to VC2 register - mco_PokeVC2

2.4.15 Read value fromVC2 register - mco_PeekVC2

2.4.16 Write value to VC2 SRAM location - mco_PokeVC2Ram

2.4.17 Read value from VC2 register - mco_PeekVC2Ram

2.4.18 Load VC2 timing table - mco_LoadVC2Timing

2.4.19 Start VC2 timing - mco_StartTiming

2.4.20 StopVC2 timing - mco_StopTiming

2.4.21 Enable video display - mco_VC2EnableDsply

2.4.22 Disable video display - mco_VC2DisableDsply


Last Modified on $Date: 1997/08/26 05:36:52 $